diff --git a/lib_com/options.h b/lib_com/options.h
index fc1d8a98b29bc8044aa46dc3bb4f3b6539706bfe..07d9d403555c72a91a2102a4ef5e992cd8e48869 100755
--- a/lib_com/options.h
+++ b/lib_com/options.h
@@ -225,7 +225,9 @@
 /* #################### Start NON-BE CR switches ########################## */
 /* any switch which is non-be wrt operation points tested in selection */
 /* all switches in this category should start with "CR_" */
+
 #define CR_FIX_585_MASA_2TC_DTX_EXT                     /* Nokia: issue 585: fixes transition artifacts in MASA 2TC DTX by applying correct condition */
+#define CR_FIX_586_BPF_DFT_MEM                          /* FhG: issue 586: set input memory of DFT analysis of BPF signal to zero for HQ core to fix issue with PLC and bitrate switching */
 #define CR_FIX_ISM_DTX_INFINITE_CNG_ON_TRAILING_SILENCE /* FhG: fix for cng in ISM DTX on sudden silence periods */
 
 /* ##################### End NON-BE CR switches ########################### */
diff --git a/lib_dec/ivas_post_proc.c b/lib_dec/ivas_post_proc.c
index 417cd7c5b4982e0b28dee6f3f04c60c7b4b70e66..b63bc6af9d028e5dd506946e053b4ab05cccabac 100755
--- a/lib_dec/ivas_post_proc.c
+++ b/lib_dec/ivas_post_proc.c
@@ -226,10 +226,21 @@ void stereo_dft_dec_core_switching(
             mvr2r( &output[st->L_frame - NS2SA( st->L_frame * FRAMES_PER_SEC, STEREO_DFT32MS_OVL_NS )], hCPE->hStereoDft->buff_LBTCX_mem, NS2SA( st->L_frame * FRAMES_PER_SEC, STEREO_DFT32MS_OVL_NS ) );
 
             /* BPF */
+#ifdef CR_FIX_586_BPF_DFT_MEM
+            if ( st->p_bpf_noise_buf && st->core != HQ_CORE )
+#else
             if ( st->p_bpf_noise_buf )
+#endif
             {
                 stereo_dft_dec_analyze( hCPE, st->p_bpf_noise_buf, DFT, 0, st->L_frame, output_frame, DFT_STEREO_DEC_ANA_BPF, 2, 0 );
             }
+#ifdef CR_FIX_586_BPF_DFT_MEM
+            /* st->p_bpf_noise_buf not updated for HQ core -> skip analysis and set input memory to zero */
+            else if ( st->p_bpf_noise_buf && st->core == HQ_CORE )
+            {
+                set_zero( hCPE->input_mem_BPF[0], STEREO_DFT32MS_OVL_16k );
+            }
+#endif
 
             /* TCX */
             stereo_dft_dec_analyze( hCPE, synth, DFT, 0, L_frameTCX, output_frame, DFT_STEREO_DEC_ANA_FB, 0, 0 );