From 4900bbaa5bbf25c7cbd7b7b4668903cdc466c60f Mon Sep 17 00:00:00 2001 From: vaclav Date: Thu, 27 Apr 2023 11:55:54 +0000 Subject: [PATCH 1/4] Update ivas_ism_dtx_dec.c --- lib_dec/ivas_ism_dtx_dec.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/lib_dec/ivas_ism_dtx_dec.c b/lib_dec/ivas_ism_dtx_dec.c index 7eb6c115ea..ce64b3fd49 100644 --- a/lib_dec/ivas_ism_dtx_dec.c +++ b/lib_dec/ivas_ism_dtx_dec.c @@ -190,6 +190,21 @@ ivas_error ivas_ism_dtx_dec( st->bit_stream = st_ivas->hSCE[0]->hCoreCoder[0]->bit_stream; st->next_bit_pos = 0; /* note: needed in paramISM -> discISM switching */ st->cng_ism_flag = 1; + + /* ISM objects with no SID: replicate 'sce_id_dtx' ISM parameters */ + if ( ivas_total_brate == IVAS_SID_5k2 && ch != sce_id_dtx ) /* note: 'sce_id_dtx' ISM parameters are read in ivas_decision_matrix_dec() */ + { + st->total_brate = SID_2k40; /* just to avoid BER complaints; true 'total_brate' is set at the beginning of ivas_sce_dec() */ + st->bwidth = get_indice( st, 1, 2 ); + if ( get_indice( st, 1 + 2, 1 ) ) + { + st->L_frame = L_FRAME16k; + } + else + { + st->L_frame = L_FRAME; + } + } #else ivas_ism_preprocessing( st_ivas, ch ); // VE: after the acceptance of switches, replace the function call by its content #endif -- GitLab From d8f6a00537d4d79cce43ddaa3db56cc6314dd92c Mon Sep 17 00:00:00 2001 From: vaclav Date: Thu, 27 Apr 2023 14:05:02 +0200 Subject: [PATCH 2/4] clang-format --- lib_dec/ivas_ism_dtx_dec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib_dec/ivas_ism_dtx_dec.c b/lib_dec/ivas_ism_dtx_dec.c index ce64b3fd49..56ef75a777 100644 --- a/lib_dec/ivas_ism_dtx_dec.c +++ b/lib_dec/ivas_ism_dtx_dec.c @@ -204,7 +204,7 @@ ivas_error ivas_ism_dtx_dec( { st->L_frame = L_FRAME; } - } + } #else ivas_ism_preprocessing( st_ivas, ch ); // VE: after the acceptance of switches, replace the function call by its content #endif -- GitLab From f0ae4f5bb000069e9bbb98610a8986725618579e Mon Sep 17 00:00:00 2001 From: vaclav Date: Thu, 27 Apr 2023 14:23:17 +0200 Subject: [PATCH 3/4] adjustments within FIX_ISM_DTX_CNG_BWIDTH_ALT to read from the bitstream only once --- lib_dec/ivas_ism_dtx_dec.c | 37 ++++++++++++++++++++++++++----------- 1 file changed, 26 insertions(+), 11 deletions(-) diff --git a/lib_dec/ivas_ism_dtx_dec.c b/lib_dec/ivas_ism_dtx_dec.c index 56ef75a777..29dbb2d83b 100644 --- a/lib_dec/ivas_ism_dtx_dec.c +++ b/lib_dec/ivas_ism_dtx_dec.c @@ -183,6 +183,29 @@ ivas_error ivas_ism_dtx_dec( if ( !st_ivas->bfi ) { +#ifdef FIX_ISM_DTX_CNG_BWIDTH_ALT + int16_t L_frame = -1, bwidth = -1; + + /* read 'sce_id_dtx' ISM parameters for replication to ISM objects with no SID */ + /* note: 'sce_id_dtx' ISM parameters are read again in ivas_decision_matrix_dec() */ + if ( ivas_total_brate == IVAS_SID_5k2 ) + { + st = st_ivas->hSCE[0]->hCoreCoder[0]; + st->bit_stream = st_ivas->hSCE[0]->hCoreCoder[0]->bit_stream; + st->total_brate = SID_2k40; /* just to avoid BER complaints; true 'total_brate' is set at the beginning of ivas_sce_dec() */ + + bwidth = get_indice( st, 1, 2 ); + if ( get_indice( st, 1 + 2, 1 ) ) + { + L_frame = L_FRAME16k; + } + else + { + L_frame = L_FRAME; + } + } +#endif + for ( ch = 0; ch < st_ivas->nchan_transport; ch++ ) { #ifdef FIX_ISM_DTX_CNG_BWIDTH_ALT @@ -192,18 +215,10 @@ ivas_error ivas_ism_dtx_dec( st->cng_ism_flag = 1; /* ISM objects with no SID: replicate 'sce_id_dtx' ISM parameters */ - if ( ivas_total_brate == IVAS_SID_5k2 && ch != sce_id_dtx ) /* note: 'sce_id_dtx' ISM parameters are read in ivas_decision_matrix_dec() */ + if ( ivas_total_brate == IVAS_SID_5k2 && ch != sce_id_dtx ) { - st->total_brate = SID_2k40; /* just to avoid BER complaints; true 'total_brate' is set at the beginning of ivas_sce_dec() */ - st->bwidth = get_indice( st, 1, 2 ); - if ( get_indice( st, 1 + 2, 1 ) ) - { - st->L_frame = L_FRAME16k; - } - else - { - st->L_frame = L_FRAME; - } + st->bwidth = bwidth; + st->L_frame = L_frame; } #else ivas_ism_preprocessing( st_ivas, ch ); // VE: after the acceptance of switches, replace the function call by its content -- GitLab From 429d8f305ebb7347b42e6d3e81ad352d27debce3 Mon Sep 17 00:00:00 2001 From: vaclav Date: Fri, 28 Apr 2023 10:50:29 +0200 Subject: [PATCH 4/4] alternative fix --- lib_dec/ivas_ism_dtx_dec.c | 31 +------------------------------ 1 file changed, 1 insertion(+), 30 deletions(-) diff --git a/lib_dec/ivas_ism_dtx_dec.c b/lib_dec/ivas_ism_dtx_dec.c index 29dbb2d83b..935db95eea 100644 --- a/lib_dec/ivas_ism_dtx_dec.c +++ b/lib_dec/ivas_ism_dtx_dec.c @@ -183,29 +183,6 @@ ivas_error ivas_ism_dtx_dec( if ( !st_ivas->bfi ) { -#ifdef FIX_ISM_DTX_CNG_BWIDTH_ALT - int16_t L_frame = -1, bwidth = -1; - - /* read 'sce_id_dtx' ISM parameters for replication to ISM objects with no SID */ - /* note: 'sce_id_dtx' ISM parameters are read again in ivas_decision_matrix_dec() */ - if ( ivas_total_brate == IVAS_SID_5k2 ) - { - st = st_ivas->hSCE[0]->hCoreCoder[0]; - st->bit_stream = st_ivas->hSCE[0]->hCoreCoder[0]->bit_stream; - st->total_brate = SID_2k40; /* just to avoid BER complaints; true 'total_brate' is set at the beginning of ivas_sce_dec() */ - - bwidth = get_indice( st, 1, 2 ); - if ( get_indice( st, 1 + 2, 1 ) ) - { - L_frame = L_FRAME16k; - } - else - { - L_frame = L_FRAME; - } - } -#endif - for ( ch = 0; ch < st_ivas->nchan_transport; ch++ ) { #ifdef FIX_ISM_DTX_CNG_BWIDTH_ALT @@ -213,13 +190,7 @@ ivas_error ivas_ism_dtx_dec( st->bit_stream = st_ivas->hSCE[0]->hCoreCoder[0]->bit_stream; st->next_bit_pos = 0; /* note: needed in paramISM -> discISM switching */ st->cng_ism_flag = 1; - - /* ISM objects with no SID: replicate 'sce_id_dtx' ISM parameters */ - if ( ivas_total_brate == IVAS_SID_5k2 && ch != sce_id_dtx ) - { - st->bwidth = bwidth; - st->L_frame = L_frame; - } + st->L_frame = min( st->L_frame, L_FRAME16k ); /* note: needed for switching from active frame with L_frame=640 to CNG in object with no SID */ #else ivas_ism_preprocessing( st_ivas, ch ); // VE: after the acceptance of switches, replace the function call by its content #endif -- GitLab